WEBVTT 00:19.789 --> 00:26.480 So, we continue our discussion power divider and combiner. This is the part two this lecture 00:26.480 --> 00:29.660 12th lecture. 00:29.660 --> 00:37.720 So, another way we can make a junction as you see, that this 1 2 collinear arms. The 00:37.720 --> 00:48.790 web guide is going. Now we know that it is h field is in this x z plane; that means, 00:48.790 --> 00:55.610 we have yesterday seen that this is circular lines with the gap of lambda g by 2. Now, 00:55.610 --> 01:02.900 that in that plane if I cut the junction; if the junction is there then it is called 01:02.900 --> 01:11.240 a h plane t junction; that means, in h plane I am having a, hearing that line is taken 01:11.240 --> 01:16.110 out. So, the side arm or collinear arm that is in the h plane. That is called the h plane 01:16.110 --> 01:19.700 t junction you see here. So, junction we take and we take it. 01:19.700 --> 01:27.330 Now, in that that is why h plain t junction. Sometimes this t also people pronounce as 01:27.330 --> 01:34.650 t double e, but we probably to call it, t because it looks like English t. Now power 01:34.650 --> 01:40.940 division in h plane here also; you see the power is if you want to divide power, you 01:40.940 --> 01:47.840 give the power to port 3. So, this power will be divided into these two. If you see the 01:47.840 --> 01:56.820 field structure, that you see this is the power is coming here, that this powers the 01:56.820 --> 02:04.330 field lines magnetic field lines so they are in circles so you see that this cross means, 02:04.330 --> 02:14.220 it is going inside the plane. It is going inside this white paper. And here it is coming 02:14.220 --> 02:19.000 out of the white paper. The magnetic field will be going and coming out from there. So, 02:19.000 --> 02:25.330 this structure if you give here. So, here you see that it starts bending and finally, 02:25.330 --> 02:32.010 it is going after some time it becomes stabilized. So, you see both the field structures, here 02:32.010 --> 02:40.791 after sometime must similar. So, from this I can guess physically that the signals, that 02:40.791 --> 02:46.840 are going into ports 1 and 2, there will be same case. 02:46.840 --> 02:54.480 That will show here also that due to symmetry again, I say that it is a 3 dB power divider. 02:54.480 --> 03:00.489 So, S 13 magnitude and S 23 magnitudes are same and from field configuration we can say 03:00.489 --> 03:07.459 that their phase is same. Now we write previous time it was minus now it is same. Other things 03:07.459 --> 03:13.519 are there the third port is match. There are mismatch in the port 1 and port 2. So, S 11 03:13.519 --> 03:17.959 and S 22 exists reciprocal device that is a web guide h pane tee. 03:17.959 --> 03:23.629 Now, you put the loss less condition that is unitary property. So, by that to proved 03:23.629 --> 03:32.790 that really half power is going and. So, and one the mismatching the 2 ports 1 and 2 their 03:32.790 --> 03:39.340 magnitude of the reflection coefficients are also same, but you see that from here we prove 03:39.340 --> 03:48.959 that S 11 is minus S 12. So, the scattering parameters a port 1 and 2 they are having 03:48.959 --> 03:54.439 opposite phase; that means, voltage the opposite putting in 1 you get this. 03:54.439 --> 04:06.299 So, this is the power divider S matrix. So, here if you look, that if you give power to 04:06.299 --> 04:14.409 port 3, here you see that power going in port 1, is half power going in port 1 half. So, 04:14.409 --> 04:22.360 it is also a 3 d b power divider, but from the expressions you see that, the 2 signals 04:22.360 --> 04:28.280 they are of equal phase. So, phase half signal and port 1 and 2 are same. 04:28.280 --> 04:38.680 Now, what happens to it is combining activity. So, they are the e plain tee was the subtracted. 04:38.680 --> 04:44.440 Here it will be an adder, you see that if I get power here so; that means, that port 04:44.440 --> 04:52.620 1. How much is going to port 3. Port 3 is getting 1 by root 2. Then, if I give power 04:52.620 --> 04:59.910 equal power at port 2; then that is getting 1 by root 2. So, total voltage is 1 by root 04:59.910 --> 05:06.360 2 plus 1 by root that is 2 by root 2 that is equal to root 2. So, power will be 2 sums 05:06.360 --> 05:13.590 of the 2 powers will be coming out of port 3, I have given power 1 here, I have given 05:13.590 --> 05:20.190 power 1 here. So, power at the port 3 that is coming out as 3. So, it is an added. So, 05:20.190 --> 05:27.250 it is a combiner so; that means, in h plane tee if give port 1 and port 2, some power 05:27.250 --> 05:36.060 p1 and p2, p3 will be p1 plus p2. Again remember asking you that remember superposition of 05:36.060 --> 05:37.060 voltage not power. 05:37.060 --> 05:44.450 Now, what is the isolation of port 1 with port, port 2 with port 1 so; that means, if 05:44.450 --> 05:51.180 I give power to port 2, how much is coming into port 1 minus of; that means, power wise 05:51.180 --> 05:58.220 this is voltage, power wise voltage ratio power wise this is 1 by 4. So, again isolation 05:58.220 --> 06:07.310 is 4 quite bad so h plain tee also has a bad isolation, VSWR you see half and half. So, 06:07.310 --> 06:17.390 both port 1 and port 2, they are S parameter, S 11 or S 22 is half. So, what will be the 06:17.390 --> 06:24.610 when all other ports are matched. This is their reflection coefficient. Now reflection 06:24.610 --> 06:30.720 coefficients magnitude is half. So, VSWR is 1 plus reflection coefficient magnitude by 06:30.720 --> 06:35.810 1 minus reflection coefficient magnitude, if we calculate that will be 3, 3 is a quite 06:35.810 --> 06:43.830 bad value, that is 25 percent or you are losing in mismatch. 06:43.830 --> 06:51.770 Now, t junction power divider. The earlier t junction power divider that we have done, 06:51.770 --> 06:59.800 you see deliberately from the while your designed we have taken that 2 ports these 2 ports they 06:59.800 --> 07:06.210 are same structured. By this we have made the impedance values of this line and this 07:06.210 --> 07:12.060 line. These were guideline these were guide line they are same so that is why we got equal 07:12.060 --> 07:18.950 power structure, but always we do not want equal power division sometimes I may need 07:18.950 --> 07:24.070 some 40 percent power should go to one arm and another 60 percent should go to another 07:24.070 --> 07:28.460 arm. So, what we have to do, I will have to play with impedances that we will show now, 07:28.460 --> 07:34.990 that unequal power divider. So, this is the general structure. You see 07:34.990 --> 07:41.300 that suppose I am giving power at port 3. I want the power should be divided into 1 07:41.300 --> 07:48.890 and 2 has before, but we have taken the characteristics impedances, equivalent characteristic impedance, 07:48.890 --> 07:55.360 or you can say wave impedance, that I will play with the impedance of the ports, in ports 07:55.360 --> 08:02.780 you can define characteristic impedance, in an equivalent way, with either axial or my 08:02.780 --> 08:06.510 transmission line ort web guide. Let us say that these are the characteristic 08:06.510 --> 08:12.730 impedance. So, this line; that means, the feeding line generally we call it port 3 for 08:12.730 --> 08:20.150 t, junctions. That characteristic impedance we are taking z3 this is z1 this is z2 now; 08:20.150 --> 08:24.230 obviously, due to junction there will be as I explained earlier there will be a susceptance 08:24.230 --> 08:31.750 we are calling it j b, but we can also put a matching screw. So, that this can be cancelled; 08:31.750 --> 08:38.769 that means, we can easily make here a minus j b, we know by another transmission line 08:38.769 --> 08:43.490 we can use. So, that is why you are telling this susceptance can be cancelled by putting 08:43.490 --> 08:51.620 a tuning screw susceptance minus j b. So, let us see what is the input admittance? 08:51.620 --> 08:57.230 Because these 2 are in parallel, these line 1 and line 2 are in parallel. So, let us reach 08:57.230 --> 09:04.209 about two admittance, what is the input admittance in from here, j b minus j b for that tuning 09:04.209 --> 09:11.329 screw then this one will show a characteristic impedance z1. So, admittance will be 1 by 09:11.329 --> 09:17.730 z1. So, this is 1 by z1 since these 2 are in parallel it will be 1 by z1 plus 1 z2. 09:17.730 --> 09:28.089 Now, to be matched at port 3, what I demand matching means, 1 by z3 is equal to y in then 09:28.089 --> 09:31.370 only it will be matched that is what I have detailed. 09:31.370 --> 09:38.069 So, my condition is this now if transmission lines are lossless, transmission lines or 09:38.069 --> 09:46.410 web guides their lossless. We know that for a lossless any in second module of this lecture 09:46.410 --> 09:55.269 since we had seen that if you have a lossless line, then it is impedances is their real 09:55.269 --> 10:01.720 quantities or propagating modes etcetera. They are real inside if there are more modes 10:01.720 --> 10:10.519 then only their having some reactive power. Now while you choose your z1 and z2, and by 10:10.519 --> 10:17.769 that you can get the power ratios, you can choose any value to get a power ratio over 10:17.769 --> 10:18.769 here. 10:18.769 --> 10:27.519 For a 3 d b, suppose I want 3 d b power divider. So, for a 3 d b power divider, I will choose 10:27.519 --> 10:35.699 like this that will give me 3 d b power. If you were to choose any other values you see 10:35.699 --> 10:43.910 that only remember that the power that will be the impedance always determines how much 10:43.910 --> 10:50.190 is the power. So, quarter wave transformers may be used 10:50.190 --> 10:54.730 to get the desired z1 z2 in the output lines. So, we will see in tutorial as etcetera will 10:54.730 --> 11:03.509 how you a that 3 is to power 5 some, ratio we will take and there. We will show that 11:03.509 --> 11:09.809 by choosing proper impedances you can design now characteristic impedance of the lines 11:09.809 --> 11:14.790 or characteristic impedance of the wave guide etcetera they depend on their dimensions. 11:14.790 --> 11:20.930 So, far required lines you will have to choose a by b by a ratio correctly. So, that you 11:20.930 --> 11:26.850 get some impedance any impedance you can fabricate, but practically there are some may be some 11:26.850 --> 11:32.189 mechanical or fabrication difficulty etcetera, but theoretically you know how to make impedan 11:32.189 --> 11:38.259 ces. So, you can choose proper impedances that will give you the power divider. 11:38.259 --> 11:45.959 Now, there is another case left for that relaxed condition. That we have not tried this is 11:45.959 --> 11:54.360 a 3 port lossy reciprocal matched at all ports. Because always we have assumed that lossy 11:54.360 --> 12:02.639 lossless structure, but there can be 3 port lossy. I have 3 port the whole structure is 12:02.639 --> 12:08.000 lossy. Reciprocal matched at all ports network. So, that is also another possibility and that 12:08.000 --> 12:16.069 is also a power divider. This one we are showing as a very symmetric thing, how to make loss 12:16.069 --> 12:23.199 lossy structure. Basically in the line you give resistance, either in it is equivalent 12:23.199 --> 12:31.600 circuit there is a resistance or you if it is a lossless line you add equal lumped resistances. 12:31.600 --> 12:37.769 You have that been shown that symmetrically you add in the 2 ports 3 resistances of equal 12:37.769 --> 12:40.430 value. Now, what is the value of this that will depend 12:40.430 --> 12:45.699 on these? So, here you have as shown in the symmetrical structure now various varieties 12:45.699 --> 12:50.990 are available you need not have these varieties together for various power division ratios 12:50.990 --> 12:56.829 that we have already seen, but let us assume for our analysis that this is z naught and 12:56.829 --> 13:04.309 z naught. So, all are of equal characteristic impedance z naught then we are adding equal 13:04.309 --> 13:14.040 resistances in 3 ports this is called a resistive power divider and also we assumed matched 13:14.040 --> 13:19.620 at all ports; that means, since the lines all have equal characteristic impedance the 13:19.620 --> 13:26.230 ports also should be terminated with load impedances of the value z naught, then only 13:26.230 --> 13:32.470 there will be a match so; that means, this port is terminated by z naught, this port 13:32.470 --> 13:37.100 is z naught this port is also z naught. 13:37.100 --> 13:48.629 So, now what is from the junction? That means, junction then this is the junction. That voltage 13:48.629 --> 13:58.769 we are calling v; obviously, that j b is also cancelled by a tuning screw. Now we want to 13:58.769 --> 14:06.499 see from port 1, this is our port 1, this is port 2, this is port 3. Now from port 1 14:06.499 --> 14:13.180 how much I am seeing the impedance, I will match that with z naught, that will be the 14:13.180 --> 14:19.470 matching because this is a matched 1. So, how much z in I am stressing to know that 14:19.470 --> 14:27.839 first let us see that from the junction if I look at port 2 and port 3 anyone suppose 14:27.839 --> 14:33.860 port 2 I am looking what I am saying r when the transmission line or characteristic impedance 14:33.860 --> 14:42.029 z naught terminated by impedance z naught. So, from here I will if I look at; obviously, 14:42.029 --> 14:48.350 the definition of characteristic impedance says that, from here look I will see z naught 14:48.350 --> 14:55.110 so, but from here from the junction if I look at this port 2, I will say that I will look 14:55.110 --> 15:02.999 at an impedance of r plus z naught. That is what I call small z is r plus z naught. Now 15:02.999 --> 15:10.410 from this junction you see I have a; that means if port 2 is showing as r plus z naught 15:10.410 --> 15:19.610 port 3, is also showing as r plus z naught. These 2 are in parallel. So, the z in that, 15:19.610 --> 15:27.839 I will from the junction. I will how much, I will see r plus z naught by 2 equal resistances 15:27.839 --> 15:38.089 in parallel up, so r plus z r plus z naught by 2 that is z. So, I will see from the junction 15:38.089 --> 15:46.370 z by 2, but from this port z in how much, I a r plus this small z by 2. 15:46.370 --> 15:52.500 Now, to be matched I put now the condition z in should be equal to z naught. If you solve 15:52.500 --> 16:01.490 you get that the value of r should be z naught by 3. So, the impedances, resistances, lumped 16:01.490 --> 16:08.709 resistances that will have to put that will equal to z naught by 3. So, this is matched 16:08.709 --> 16:17.579 at all ports. So, you can put that it is S 11 S 22 and S 33 all are 0. 16:17.579 --> 16:24.959 Now, this junction voltage in terms of port 1 voltage you can easily write. If this is 16:24.959 --> 16:34.910 V 1 this will be r plus this, 1 is small z by 2. So, if you do that you can easily relate 16:34.910 --> 16:41.220 V and V 1 that we have done here. So, V is equal to two-third V 1. 16:41.220 --> 16:47.269 Similarly, if you call this voltage as V 2 and this voltage as V 3, obviously, from symmetry 16:47.269 --> 16:57.059 V 2 and V 3 will be same and that value we can say that this will be V 1 by 2. So, once 16:57.059 --> 17:04.730 you have these we can easily write what is S 21; that means, if I give some signal here 17:04.730 --> 17:11.589 how much will go there, if you do that already you have shown that V 2 will be V 1 since 17:11.589 --> 17:18.470 impedance is same. So, S 21 we can say as this will be half this will be half. 17:18.470 --> 17:25.730 Now, due to symmetry of network V 3 is applied then S 23 also half. So, isolation of this 17:25.730 --> 17:33.650 device is again same as port that the poor isolation between outputs, ports of resistive 17:33.650 --> 17:37.490 divider so this is also possible. 17:37.490 --> 17:44.940 And here you see that, there will be resistive divider S matrix now we can write like this. 17:44.940 --> 17:50.220 From all those knowledge; obviously, this is a lossy device; that means power will be 17:50.220 --> 17:56.350 lossed inside of the resistive divider also. So, this is the thing and; obviously, this 17:56.350 --> 18:01.520 is not a unitary matrix because this is a lossy device. So, we do not have resource 18:01.520 --> 18:10.120 to do not try to find unitary property here; 1 square plus 1 square that is 2. Not equal 18:10.120 --> 18:20.140 to 1 or you can put 1 into 1 is not 0; 1 into 1 star that will be 1 into 1. So, since it 18:20.140 --> 18:22.400 is not a satisfying unitary property. 18:22.400 --> 18:30.690 So, resistive divider is once as example. It is isolation is poor it has loss now how 18:30.690 --> 18:37.660 much power is lost in the resistive one for that we have made this calculation power dissipated 18:37.660 --> 18:43.890 is half. So, you see whatever power I am giving half of the power is getting dissipated in 18:43.890 --> 18:50.730 the device. In case of non matched if there are e plain tee junctions or h plain tee junctions; 18:50.730 --> 18:58.780 we are getting that in mismatch there is one-fourth power going. Here that is absent, but in loss 18:58.780 --> 19:03.860 half of the power is going. So, half of the power is dissipated in the network. If you 19:03.860 --> 19:08.080 are ready to suffer that you can use resistive divider. 19:08.080 --> 19:15.190 So, drawback of resistive divider is this. Now there is a design by Wilkinson. At the 19:15.190 --> 19:21.350 resistive divider, is you see again the summary 3 ports lossy matched at all ports, made of 19:21.350 --> 19:28.190 isotropic material. High insertion loss because this inside there is half of the power is 19:28.190 --> 19:30.780 lossed. So, insertion loss is quite high. 19:30.780 --> 19:39.230 Now, there is another design, that semi structure that all three lines z naught z naught, but 19:39.230 --> 19:48.270 instead of lumped elements you have two other transmission lines in port 2 from the junction 19:48.270 --> 19:58.610 of lambda by 4 length, and root to z naught test to impedance and also there is a form 19:58.610 --> 20:10.290 that line. Here is a lumped resistance of value 2 z naught if you add these then you 20:10.290 --> 20:22.020 can correct one of the that isolation problem of power divider that is called Wilkinson 20:22.020 --> 20:28.540 power divider is very popular that very simply by you can make these. 20:28.540 --> 20:37.400 So, the analysis part we have given actually here, you see because of the presence of these 20:37.400 --> 20:40.710 actually there is a coupling between two and three. 20:40.710 --> 20:48.650 So; that means, the 2 ports where the power is getting divided, they are coupled by this 20:48.650 --> 20:57.070 resistance. So, anything two things going and they are coupled mutually coupled that 20:57.070 --> 21:05.810 analysis is difficult, but one of the way by which we tackle that difficulty is called 21:05.810 --> 21:15.860 that we break it into, some Eigen mode things you know that even mode is by proper excitation 21:15.860 --> 21:22.960 we can make. So, that that coupling is reduced, those are called Eigen mode excitations. So, 21:22.960 --> 21:28.400 sometimes that is the even modes are called in terms of even and odd mode of it is excitation. 21:28.400 --> 21:34.410 Generally they called that, but basically conceptually it is Eigen mode. So, that sums 21:34.410 --> 21:41.350 you utilize some properties so that that coupling part is absent. So, that does not make the 21:41.350 --> 21:46.040 analysis simpler so that we do here. 21:46.040 --> 21:56.120 So, for that you see this even mode excitation is that 2 and 3, both the ports we will give 21:56.120 --> 21:58.420 equal value excitations. 21:58.420 --> 22:10.110 So, the whole structure is such that it breaks down the network and it breaks down through 22:10.110 --> 22:17.600 this simple thing, by that you find out and find out that input impedance of that is this 22:17.600 --> 22:21.560 one for even mode. 22:21.560 --> 22:29.690 Now, so other things you can all explain if you have understood that thing. Transmission 22:29.690 --> 22:37.380 line concept you can find out this. So, we have shown odd mode excitation even mode excitation. 22:37.380 --> 22:44.650 Now, excitation these two about the even mode and odd mode analysis, from that the final 22:44.650 --> 22:46.220 thing will be you see one. 22:46.220 --> 22:54.300 That one I can say that odd mode excitation is V z2 and V z3 they are opposite voltages. 22:54.300 --> 23:01.100 So, basically what we are doing when we will sum even and odd mode excitation, the port 23:01.100 --> 23:07.460 2 excitations in previous case it was same as this. So, twice of that and this will be 23:07.460 --> 23:14.910 0 so basically sum of this is the actual excitation; that means, what we are finding is when I 23:14.910 --> 23:21.830 am exciting port 2 what is happening to port 1 what is happening to port 3. 23:21.830 --> 23:26.880 Now, due to symmetry I can say the same thing I can do for port 3. So, this part is over 23:26.880 --> 23:33.340 only 1 part is remaining. That if I excite port 1 what happens. That we are is doing 23:33.340 --> 23:40.090 here excitation at port 1 port 2 and 3 match terminated. If we do that then it boils down 23:40.090 --> 23:45.891 to that there is a gain due to symmetry, I can say that the voltage here and voltage 23:45.891 --> 23:52.370 here will be same. So, there is no current through this resistor and that is why we can 23:52.370 --> 23:59.210 take it out of the circuit, and this is actually going to the similar to the even mode of excitation. 23:59.210 --> 24:01.730 So, no current again flows to that. 24:01.730 --> 24:10.170 And then we calculate some values then what are the S parameter values. So, we got this 24:10.170 --> 24:19.760 thing, that it is a reciprocal when power is fed at port 2, so infinite. So, we calculated 24:19.760 --> 24:31.260 this S 23 and S 32 they turned out to be 0. 24:31.260 --> 24:42.960 So, if you see that we have finally, proved that s23 and s23 0. What is s23, that means, 24:42.960 --> 24:51.810 I have the power is ampediant port 3 I am getting at port 2 there is nothing. So, what 24:51.810 --> 25:00.750 we will do isolation. Isolation is power given p in and the power suppose I am giving the 25:00.750 --> 25:14.940 power to port 3. Power a p in power at port 3. So, p in at port 3 and power going to port 25:14.940 --> 25:19.940 0 is, if s23 is 0 power is also going to be 0. 25:19.940 --> 25:29.480 So, isolation is infinity. So, this is ideal similarly. So, 2 and 3 both the ports they 25:29.480 --> 25:36.650 are isolated ports. That means this is the beauty of infinite isolation output port. 25:36.650 --> 25:45.640 So, let us go back to the our original figure of Wilkinson power divider, this is analysis 25:45.640 --> 25:51.090 this Wilkinson power divider by putting this resistor, of this much value this values we 25:51.090 --> 25:55.760 have derived that how to find out what are the values of this resistor, that will be 25:55.760 --> 26:01.850 2 z naught, characteristic impedance here is this root 2 z naught, if you do like this 26:01.850 --> 26:07.730 then the you can put between this port and this port they are isolated. 26:07.730 --> 26:13.650 Now, isolation we required, because why we require isolation because actually we are 26:13.650 --> 26:17.740 trying to give that this port we are giving power, power should be divided between these 26:17.740 --> 26:24.880 2. Now if there is by chance because load is in not in my hand. The loading of 2 or 26:24.880 --> 26:30.420 loading on 3 is different from their characteristic impedance. Here in analysis time we are assuming 26:30.420 --> 26:35.780 their match terminated, but in reality there can be some load. So, there can be some power 26:35.780 --> 26:41.820 that gets reflected. Problem is if these ports 2 are not isolated, 26:41.820 --> 26:47.240 what about the reflected power that will again through this junction that will come here. 26:47.240 --> 26:54.530 It will unnecessarily disturb the 3 port. So, due to the mismatch in port 2 port 3 will 26:54.530 --> 27:00.320 suffer. If the isolation is poor, but if the isolation is high then even if there is some 27:00.320 --> 27:05.870 reflected power here, that will not disturb the others. So, do not disturb your neighbours 27:05.870 --> 27:12.010 you may have some fight in your house, but do not that fight should not be skill; to 27:12.010 --> 27:19.720 some junction it will go to your neighbours power, that is why we require isolation by 27:19.720 --> 27:25.751 this Wilkinson power divider that gives that isolation, that is why it is a popular. Though 27:25.751 --> 27:31.190 it has internal losses because this structures you have some losses here. 27:31.190 --> 27:39.580 So, it is not a lossless structure but. So, now, let us see various power dividers their 27:39.580 --> 27:46.810 comparison, we have made a table for that. So, we have seen lossless tee junctions. Their 27:46.810 --> 27:51.870 good because internally they are not having power, but not matched at 2 output port also 27:51.870 --> 27:59.850 they have poor isolation between ports, resistive divider it has high power dissipation towards 27:59.850 --> 28:06.230 isolation between output ports. Wilkinson power divider again it is a high power dissipation, 28:06.230 --> 28:13.100 but it has input on one thing that good isolation between output ports. So, you choose that 28:13.100 --> 28:20.850 which one you want to take. Now you can see that all this power dividers they have some 28:20.850 --> 28:31.131 disadvantage. So, I cannot have the isolation and dissipation or matching; that means, loss 28:31.131 --> 28:39.120 I cannot, total loss I cannot make 0. Here now that limitation is because we have confined 28:39.120 --> 28:45.620 ourselves with 3 port device. Now if I go to 4 port device all this problem will be 28:45.620 --> 28:52.630 solved that we will see in our next lecture. Thank you.